1. Field of the Invention
This invention relates to integrated circuits, and more particularly, to clock circuits for producing clock signals.
2. Description of the Related Art
Complex integrated circuits, such as microprocessors, often times have the need to operate different portions using different, independent clock signals. Each of these different portions is referred to as a clock domain. For example, a microprocessor may have a first processor core, a second processor core, and a bus interface unit that each operate using separate and independent clocks. These clocks may operate at different frequencies, and often times, at frequencies that may be varied according to specific needs. For example, the clock signal of a first processor core that is performing a processor-intensive task may operate at a higher frequency than the clock signal of a second processor core that is performing a less intensive task. The frequencies of these clock signals may be raised and lowered as necessary depending on the tasks to be performed as well as other considerations, such as power consumption and/or thermal output.
The simplest way to implement multiple clock signals is to provide multiple oscillators. A more common solution that is used with integrated circuits is to provide a single oscillator or other type of clock generation circuit to generate a reference clock, which is then provided to multiple phase-locked loops (PLLs). Each different PLL can provide a clock output signal independent of the others. Furthermore, PLLs can be configured to make the frequency of their respective output clock adjustable. While PLLs are analog circuits, they can be implemented on an integrated circuit die that otherwise is comprised primarily of digital circuits.